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Mobile World Congress, Barcelona – Day 3: Less wires = wireless February 23, 2010

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The Barcelona sun finally starts to arrive and helps to put the serious business being conducted here into a supportive environment. The best deals are being cut at the outside coffee table. The forward looking roadmap conversations happen by sitting together on the fountain walls.

Mobile is a massive business. Indian software services company WIPRO employs about 1,100 engineers in the mobile practice software services alone. As their general manager Arvind Jayabal points out they prefer doing their work in the fully green oriented WIPRO facilities rather than being forced to work at their international customers facilities. One forcing function for that is the infrastructure to develop software, like specific development board, which may only be available in limited quantities and locations. Virtualization of electronic platforms should be able to solve this problem soon.

Not less massive – from a booth perspective – is the appearance of Microsoft’s new Windows Mobile OS. Even on day 3 a faithful crowd of visitors listen to what the moderator has to say about the great features of managing your social life. You can aggregate all of your friend’s data from your own address book, calendar and FaceBook. Looks very cool. Many people are listening to this while happily typing an e-mail on their Blackberry or checking FaceBook on their iPhones….

Mobile video remains an interesting topic throughout the show. CEVA showcases their newest flagship, dual core DSP. The two DSPs are actually performing different tasks within video processing and have been optimized for those using the latest processor design technologies in this area. The CEVA CTO, Erez Barniv, points out proudly that a full rate 1080p HD video can run on an FPGA implementation of their DSP at just 50 MHz clock speed. This provides a promising outlook to using this new core for actual handset chips. DSP industry analyst Will Strauss stops at the demo and is significantly impressed by the technology as well.

Cambridge based mobile IP leader ARM is presenting several netbook products in their booth. More and more of their Chinese customers require them to predict performance for a specific set of target product constraints. ARM is addressing this through their sophisticated traffic generation tools combined with their partners providing the exploration and modeling technologies for ARM’s interconnects. They also point out that significant breakthroughs on the software side are necessary to keep their Santa Clara competitor on a distance in their home market. “They told us, before you can do Flash, you can’t sell real computers. Now we have it. What is their next challenge?”

The green topic in terms of power consumption continues in the infrastructure market. If you are dialing 911 from your cell phone in the US your location information should better be true. TruePosition is the provider of pizza box sized electronics that AT&T and T-Mobile are putting on their basestation towers to calculate your position from relaying several basestation measurement data. Many of these types of infrastructure systems are today being implemented using a combination of FPGAs and DSPs. The race for getting all the ‘green content’ is on between the TI and Freescale and Xilinx and Altera. In the end only the innovation of the system OEMs to advanced algorithms, software implementation, hardware implementation or custom processor design is making the green difference. The semiconductor companies just deliver the basic ingredients.

Away from the business discussion into the consumer view again one booth caught a significant attention, mostly because of clever marketing. The booth for “Powermat” was entire closed with the exception of a small entrance where customer had to line up for badge scanning. The process was deliberately slow, so a busy line would form. The product concept? Put your Smartphone into an additional protection sleeve that contains a power plug and a wireless charging device. Carry around a much bulkier phone all day so that when you come home you can just drop it on the Powermat, where it charges. Spend lots of dollars on ‘new sleeves’ for each of your device and discard the included charged from your device. If they can stay in business until the phone manufacturers will include the technology into the standard phone package this maybe interesting.

In the end business managers return satisfied from the show. It is a worthwhile concentration of decision makers in the industry. They have their calendars marked for 2011 already.

Mobile World Congress, Barcelona – Day 2: Performance and cost – it’s a stretch February 20, 2010

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Orientation on the second day is a lot easier. Enter hall 8 where the titans of the industry play. Make a right at docomo, go straight to Research in Motion and head straight into leader Nokia? Hold on, Nokia was not exhibiting this year at the event! They offered a comfortable Rikscha ride from the Fira to their meeting place. Even though they refrained from the race to show new hardware, they made a significant software announcement with Intel to merge their Linux efforts into one. This again underpins Intel being serious about their Atom strategy for the mobile market.

So what was the stretch in this day? It was the low-end to high-end stretch. On the high end you would find small software players such as a Swedish company, Ikivo, specializing in high performance user interfaces for selecting from your address book or list of songs. Or specialized IP companies like Chips & Media from Korea producing high performance video IP. Of course the big semiconductor companies play in the performance game, such as TI with their OMAP processors. You wouldn’t expect that this processing power is actually needed to drive something as simple looking as an eBook reader, where the display update speed for the sophisticated low power displays is heavily influenced by the digital signal processing done by the processor. What do all of these examples have in common? It’s the combination of performance of software and hardware. It is critical for this industry to optimize both. Many times it can be done using virtualization technologies sometimes it will require additional subjective testing for the final selection as well.

On the low-end Vodafone announced the $20 retail phone (note – this is without subsidies). Customers can do voice and SMS with it. Imagine the amount of hardware optimization that will produce silicon at that cost level. Not only phones need to be extremely cheap to serve the underdeveloped areas, the network infrastructure needs to very affordable as well. Indian developer VNL demonstrated the low cost, rural area GSM infrastructure, which is using solar powered repeaters to get the GSM signal out into the country side. They are able to provide network operators with revenue even at ARPU of $2. Here the simulation of the physical layer for GSM is critical as it determines how far the operator can stretch the equipment. The chairman of the company told me that a local team of construction people can put the battery, solar and antenna on a roof top in just under 4 hours.

If you think the hardware and software content solely drive the technology edge, Samsung proves that you are mistaken. Their ‘Wave’ phone displays the brightest color with the lowest reflection and the easiest touch in the industry. It doesn’t look like they will license their ‘super-AMOLED’ technology anytime soon to their Cupertino based Smartphone competitor.

Mobile World Congress, Barcelona – Day 1: It’s the capacity stupid! February 16, 2010

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For those US visitors that came to the Fira de Barcelona this year with the blurred vision from comparing coverage maps in the never ending Verizon vs. AT&T commercials, they were up for a surprise! Vodaphone, the European operator counterpart, is much less embarrassed to push Femtocells as the recipe against missing coverage. Of course all of us in the software industry have known this trick for years, turning a bug into a feature.

This year’s MWC event is again the marketplace for the mobile world of tomorrow. 45,000+ attendees are lining up in front of the newest gadgets and applications (and the spare foodcourts). One would think that the most useful innovations are the software applications, such as the next Dolby implementation for mobile devices demonstrated in comfortable chairs playing Avatar trailers. The most eye popping innovation today actually was the concept demo from Japanese leader docomo. They showed a headset picking up the eye movements of the user to control the connected audio device operation. There was still room for improvement though as the poor Japanese engineer demonstrating it had to work pretty hard with his eyes. A lot more pleasant to look at was the concept packaging for the next generation phones from docomo. It was a handy roundish shape and it was made out of spare wood produced as a natural product of thinning out the Japanese forests. Already today you can buy ‘the leaf’, a biodegradable protection for your iPhone, made in green Ireland. It will disappear in your backyard in 1-5 years – but don’t try this with your iPhone itself.

Let’s come back to the capacity question. Aditya Kaul from ABI research was hired by the Femtocell Forum to present on trends for these new pieces of infrastructure that today help out operators with coverage, but could become the panacea for their capacity problem. From today until 2015 it is predicted that the gap between peak and average capacity offered by the basestations deployed will increase 90-fold. That means for people living in dense areas, they may show five bars of signal strength on their Smartphones, but they will never get their 1080p movie to upload to their FaceBook page because of lacking local network capacity. For 2010 ABI predicts only 1,000,000 units of Femtocells shipped world-wide, but this number may need to increase dramatically.

Another way of increasing the capacity is being demonstrated by the wireless patent producer Interdigital Communications. Their VP Air Interface and RF Systems, Ariela Zeira, explains at their booth about advanced handover using ‘fuzzy cells’ or traffic aggregation mixing cellular and WiFi transports to maximize bandwidth.

Also Xilinx is happily positioning their LTE Targeted Design Platform for the entire range of eNodeB designs including Femtocells. If you walk onto their booth and get a demonstration of their reference design they will point out that “you will not find a DSP as part of our solution, it is all being done with IP implemented in Virtex-6”. I kind of expected that, but was disappointed not to see a power meter for their solution, which would have put their product right into the context of the other green solutions I mentioned before.

Finally the participants are not greeted by a green, warm spring. Coming in transit from the winter-stricken Germany, I had hoped for something much better. Well, back into the busy halls of the MWC then, tomorrow.

Using Virtual Platform Software as a Service for go-to-market January 28, 2010

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For electronic system companies (IP, semiconductor or system companies), providing access to a virtual model of their electronic systems can provide great benefits. Doing it using software as a service expands it even more.

There are of course the independent benefits of virtual platforms (available pre-hardware, easier to use than hardware, …) and of Software as a Service (no requirement local installation and license management, no compatibility issues between software and host operating system, access to server farm with consistent computing power, software installed and running, universal access anywhere, …), but the combination of the two is really what makes it attractive.

Let’s take the example of a semiconductor interested in going to market with their chip. Rather than delivering a datasheet and waiting for silicon availability, you can provide to interested customers, prospects and partners an immediate experience using a virtual platform without having to deliver anything to your customer directly. You can experience such concept by visiting CoWare Versatile reference virtual platform at http://www.coware.com/solutions/vp_saas.php.

Such approach will enable companies to engage customer early, increase your credibility and product success while maintaining go-to-market costs low. Are you using virtual platform? Are you using SaaS for your engineering tools? We would like to hear your experience!

Do you have the right ‘connection’? October 21, 2009

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There is a lot of conversation these days about the impact of Electronic System Virtualization (ESV) on software development. Isn’t it obvious, that it is much better to develop software earlier, before chips are available? Don’t you agree that looking into the guts a multi-core platform for debugging a tough multi-threading problem is much easier using a Virtual Platform, than to use a board with a JTAG connected debugger? Wouldn’t it be nice if the semiconductor and OEM supply chain use this as their standard way of accelerating their time to market? Isn’t this the only problem that ESV addresses?

Actually this only one problem, albeit a big one, that ESV addresses. It deals typically with the next generation silicon and product, which in most companies is called N+1.

What about the products, that are further out, say N+3? Do you have the software applications that will run on those products in your hand today? No, they will be invented in the next few years. Do you even know the processors that you will be using for N+3? Maybe, but there are no models for those yet. What you do know today is the type of applications that you need to run. You may know the performance profile in terms of traffic that they trigger. You probably know exactly, which interconnect and protocol you will be using, because the interconnect, the backbone of your chip, is typically stable for many generations of platforms that you are developing or will be using.

Getting a precise idea, what your interconnect will deliver for the myriad of use cases and applications, that you need to support, is critical for making your design decision for N+3. The right ‘connection’ with the right bandwidth and priority management between your processors and the internal/external memory systems determines, if your N+3 chip or end product is competitive or not.

If you are a development engineer at an OEM or semiconductor company, this is what you care about.

However, it is even more critical that your company cares about a ‘connection’ at a business level. If you are the SmartPhone OEM trying to stay ahead of the pack or beating #1, you need to specify the most advanced silicon platform that will deliver on that goal. If you are a semiconductor company, that has a socket in N+1, you want to maintain that socket for N+3 or push your competitor out of it.

If you are the OEM, how do you communicate to your bidders, what they need to deliver? If you are the semiconductor supplier, how do you credibly pitch, what you can do vs. your competitor? The risks for miscommunication and missing the performance are high. What if you had an ESV solution, that serves as the specification that you can rely on for N+3? Do you want to have a ‘connection’ between you as an OEM and you as a semi based on industry leading interconnect IP, protocols and ESV solutions for architecture design?

Missing the ‘connection’? Talk to ARM and CoWare.

How will you deploy Electronic System Virtualization? July 30, 2009

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Today the problem for companies developing electronic systems is not anymore the existence of the right technology, but rather how will I deploy it. Electronic System Virtualization must cover areas such as processor design, system architecture, oftware development, go-to-market enablement, configuration, etc. The virtualization of the electronic system must start from the specification all the way to the deployment of the system itself independently of the system being a core, an SoC, a board, a device or a network of devices.

The use of electronic system virtualization is proven to deliver the value. Many companies are now presenting their results and the significant benefit they are getting. However none of these companies have considered a single use case for virtual platforms for example. They have derived results from using virtual platform as an infrastructure across several of the product life cycle tasks. 

The implication of this reality is that the deployment of Electronic System Virtualization technologies will require individuals and organizations driving their deployment. It will require executive support, it will require the willingness to introduce changes.

The drivers behind this change will be the leaders of tomorrow.

46th DAC – Debating ESL, again… July 30, 2009

Posted by jstahl09 in Embedded, software, system design, Virtual Platforms.
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For those tracking the history of the last 10 years of DAC panel discussions about ESL, they fall largely into two camps: the language debate and the high level synthesis debate. The 46th DAC was no exception to that pattern, and frankly, it is getting very old…

On the language debate you will find the debaters who think that by just changing the language, that designers use, to be something that resembles C or C++ , productivity will go up dramatically.  Some people will believe just because it is C/C++ they are closer to have a cheap, open source based tool flow.  The reality is that none of these statements are helpful or practical for real design life. A language in itself has no value without semantics and tools that exploit the semantics for a purpose (also known as a use case).  Open source approaches for tools are the last thing design teams want to rely on for their critical design project during a recession time.

On the high-level synthesis it is simply the question if the higher abstraction level for hardware block design is the critical problem for multi-core SoC design. With the cost of software development skyrocketing for fabless and integrated semiconductor companies, how much do they really want to invest into the hardware component design automation. Is it more important to make 100 hardware designers productive or 400 software developers?

It is time to concentrate efforts on the real big cost savers for multi-core design. Rather then spending the time on making that one new RTL block easier to develop, spend the time to prepare the models for the many other IP blocks on the chip, that are critical for architecture exploration and early software development.

It is time for Electronic System Virtualization. The 47th DAC will have to demonstrate, that it can concentrate its attention on the bigger issues.  Who wants to sit through another ESL debate next year?

Virtual Platform Workshop at DAC July 29, 2009

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Qualcomm reporting on the opportunities and challenges of Virtual Platforms for their system designs. QC has been highlighting the productivity gain they get from Virtual Platforms for Software Development, Architecture Definition, Hardware Development and Early Customer Success. Qualcomm is following an incremental Virtual Platform creation approach to incrementally enable software development and get value out of VPs as early as possible. QC has reported a significant quality gain because they are able to develop the tests upfront and do not need to wait until the HW is available for the test development. VPs help QC to improve the coverage of their testing using complex software use-caes. VPs have enabled QC to create tests that they could not create before. Challenges remain on the Virtual Platform enablement side. For QC it was key to choose a standards-based modeling language and TLM to ensure interoperability between models. The driver to select a tool and/or language is its ability to create virtual platform models that are fast, at a higher level of abstraction, are interoperable, and that can be created in an easy way. QC reported that it is key for them that their engineers are enabled to carry out the modeling. It is of significant importance that a wider set of engineers/IP architects are enabled to create models with the above mentioned characteristics.

System Prototypes: Virtual, Hardware or Hybrid? July 29, 2009

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The Tuesday’s panel “System Prototypes: Virtual, Hardware or Hybrid” at DAC was well attended with an active and exciting discussion among the panelists and the audience. Panelists came from Amicus Wireless, Qualcomm, LSI, Synopsys, ST-Ericsson and CoWare. There was a consensus that there is no on-size-fits all solution for prototyping. Different design tasks such as system level architecture definition, software prototyping and bring up and implementation prototyping have different requirements on the prototyping solution. Qualcomm and ST-Ericsson have reported about their successful adoption of virtual prototyping using Virtual Platforms for early software development. Both reported that Virtual Platforms has significantly smoothed their software bring-up step-function that they typically had without Virtual Platforms and when the hardware became available late in the design. Questions have been raised about the accuracy of Virtual Platforms. Here, the panelists where in agreement that a Virtual Platform does need to provide the accuracy required for the different design tasks such as being just functional accurate for software development. I have been reporting a trend that we see at our Electronic System Virtualization solution users moving away from spreadsheets for the architecture definition. This was hitting a question from  the audience how Virtual Platforms can be used for HW/SW partitioning. System level architecture prototyping is done using non-functional workload models characterizing traffic scenarios for application/task mapping as well as interconnect and memory subsystem optimization. This way the dynamics of a system can be captured which is not possible using static spreadsheets. Other questions were about using Virtual Platforms after silicon is out. Here, the Google Android Emulator was mentioned as a perfect example how Virtual Platforms deliver value to even the application software developers by having access to a fully virtualized environment including GPS, Internet, Accelerometer to develop disruptive applications. People in the audience where also reporting about the trouble they face when trying to bring up systems on an FPGA, it simply does not fit for many cases. FPGAs are used for block level implementation prototyping but cannot provide a full environment. It was an exciting panel and it has clearly shown the increasing demand and adoption of Virtual Platforms in the industry.

DAC: Electronic System Virtualization Success at Motorola July 29, 2009

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This week CoWare has been pleased to welcome Victor Leonov, distinguished member of technical staff, Motorola Mobile Devices and user of CoWare Platform Architect, to the CoWare DAC booth as a expert guest speaker on architecture design. His presentation, Achieving Optimal Cost-performance Balance in Advanced Wireless Modem Chipsets using Stochastic Simulation, was of high interest to SoC system architects and project managers here at the show.

Motorola uses CoWare’s ESV environment to analyze system architecture and optimize system performance of the next generation wireless modem chipset for Motorola mobile phones. The key design challenge during product planning was to confirm, as early as possible, that a single modem SoC was able to support the performance requirements of a complete portfolio of handsets, without overdesigning the modem SoC. The results of the project are impressive:

  • Motorola’s chipset architecture was optimized to meet all product tiers’ corner use cases
  • It’s product architecture fits into three groups of performance-critical HW configurations
  • Each configuration meets targeted product cost
  • Final product exceeds targeted performance by approximately 10%

Visit the booth Wednesday morning at 11am for more details!