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DAC: Electronic System Virtualization Success at Motorola July 29, 2009

Posted by systemleveldesign in Embedded, LTE, system design, Wireless.
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This week CoWare has been pleased to welcome Victor Leonov, distinguished member of technical staff, Motorola Mobile Devices and user of CoWare Platform Architect, to the CoWare DAC booth as a expert guest speaker on architecture design. His presentation, Achieving Optimal Cost-performance Balance in Advanced Wireless Modem Chipsets using Stochastic Simulation, was of high interest to SoC system architects and project managers here at the show.

Motorola uses CoWare’s ESV environment to analyze system architecture and optimize system performance of the next generation wireless modem chipset for Motorola mobile phones. The key design challenge during product planning was to confirm, as early as possible, that a single modem SoC was able to support the performance requirements of a complete portfolio of handsets, without overdesigning the modem SoC. The results of the project are impressive:

  • Motorola’s chipset architecture was optimized to meet all product tiers’ corner use cases
  • It’s product architecture fits into three groups of performance-critical HW configurations
  • Each configuration meets targeted product cost
  • Final product exceeds targeted performance by approximately 10%

Visit the booth Wednesday morning at 11am for more details!