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How will you deploy Electronic System Virtualization? July 30, 2009

Posted by marcseru in Uncategorized.
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Today the problem for companies developing electronic systems is not anymore the existence of the right technology, but rather how will I deploy it. Electronic System Virtualization must cover areas such as processor design, system architecture, oftware development, go-to-market enablement, configuration, etc. The virtualization of the electronic system must start from the specification all the way to the deployment of the system itself independently of the system being a core, an SoC, a board, a device or a network of devices.

The use of electronic system virtualization is proven to deliver the value. Many companies are now presenting their results and the significant benefit they are getting. However none of these companies have considered a single use case for virtual platforms for example. They have derived results from using virtual platform as an infrastructure across several of the product life cycle tasks. 

The implication of this reality is that the deployment of Electronic System Virtualization technologies will require individuals and organizations driving their deployment. It will require executive support, it will require the willingness to introduce changes.

The drivers behind this change will be the leaders of tomorrow.

System Prototypes: Virtual, Hardware or Hybrid? July 29, 2009

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The Tuesday’s panel “System Prototypes: Virtual, Hardware or Hybrid” at DAC was well attended with an active and exciting discussion among the panelists and the audience. Panelists came from Amicus Wireless, Qualcomm, LSI, Synopsys, ST-Ericsson and CoWare. There was a consensus that there is no on-size-fits all solution for prototyping. Different design tasks such as system level architecture definition, software prototyping and bring up and implementation prototyping have different requirements on the prototyping solution. Qualcomm and ST-Ericsson have reported about their successful adoption of virtual prototyping using Virtual Platforms for early software development. Both reported that Virtual Platforms has significantly smoothed their software bring-up step-function that they typically had without Virtual Platforms and when the hardware became available late in the design. Questions have been raised about the accuracy of Virtual Platforms. Here, the panelists where in agreement that a Virtual Platform does need to provide the accuracy required for the different design tasks such as being just functional accurate for software development. I have been reporting a trend that we see at our Electronic System Virtualization solution users moving away from spreadsheets for the architecture definition. This was hitting a question from  the audience how Virtual Platforms can be used for HW/SW partitioning. System level architecture prototyping is done using non-functional workload models characterizing traffic scenarios for application/task mapping as well as interconnect and memory subsystem optimization. This way the dynamics of a system can be captured which is not possible using static spreadsheets. Other questions were about using Virtual Platforms after silicon is out. Here, the Google Android Emulator was mentioned as a perfect example how Virtual Platforms deliver value to even the application software developers by having access to a fully virtualized environment including GPS, Internet, Accelerometer to develop disruptive applications. People in the audience where also reporting about the trouble they face when trying to bring up systems on an FPGA, it simply does not fit for many cases. FPGAs are used for block level implementation prototyping but cannot provide a full environment. It was an exciting panel and it has clearly shown the increasing demand and adoption of Virtual Platforms in the industry.

DAC: Electronic System Virtualization Success at Motorola July 29, 2009

Posted by systemleveldesign in Embedded, LTE, system design, Wireless.
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This week CoWare has been pleased to welcome Victor Leonov, distinguished member of technical staff, Motorola Mobile Devices and user of CoWare Platform Architect, to the CoWare DAC booth as a expert guest speaker on architecture design. His presentation, Achieving Optimal Cost-performance Balance in Advanced Wireless Modem Chipsets using Stochastic Simulation, was of high interest to SoC system architects and project managers here at the show.

Motorola uses CoWare’s ESV environment to analyze system architecture and optimize system performance of the next generation wireless modem chipset for Motorola mobile phones. The key design challenge during product planning was to confirm, as early as possible, that a single modem SoC was able to support the performance requirements of a complete portfolio of handsets, without overdesigning the modem SoC. The results of the project are impressive:

  • Motorola’s chipset architecture was optimized to meet all product tiers’ corner use cases
  • It’s product architecture fits into three groups of performance-critical HW configurations
  • Each configuration meets targeted product cost
  • Final product exceeds targeted performance by approximately 10%

Visit the booth Wednesday morning at 11am for more details!

NASCUG Does It Again at DAC July 28, 2009

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The North America SystemC User Group (NASCUG) once again held it’s popular SystemC user group meeting at DAC. Attendance was good, with over 100 people attending to hear the OSCI update, education on SystemC standards, and technical papers from users on the application of SystemC, and to participate in an open Town Hall meeting style discussion.

Interestingly, many of the attendees were attending NASCUG for the first time. According to the innovative live survey “clicker” response system, 43% were first time attendees. That said, the majority of the attendees considered themselves intermediate, advanced, or power users of SystemC. Before diving into the papers, OSCI announced progress in the TLM WG, AMS WG, and Synthesis WG activities (read more at www.systemc.org) and gave updates on all WG activities, including the new Configuration, Control, and Inspection (CCI) WG.

Technical presentations covered modeling, software development, architecture design, and verification.  For the complete agenda and access to the presentations, visit www.nascug.org.