46th DAC – Debating ESL, again… July 30, 2009Posted by jstahl09 in Embedded, software, system design, Virtual Platforms.
For those tracking the history of the last 10 years of DAC panel discussions about ESL, they fall largely into two camps: the language debate and the high level synthesis debate. The 46th DAC was no exception to that pattern, and frankly, it is getting very old…
On the language debate you will find the debaters who think that by just changing the language, that designers use, to be something that resembles C or C++ , productivity will go up dramatically. Some people will believe just because it is C/C++ they are closer to have a cheap, open source based tool flow. The reality is that none of these statements are helpful or practical for real design life. A language in itself has no value without semantics and tools that exploit the semantics for a purpose (also known as a use case). Open source approaches for tools are the last thing design teams want to rely on for their critical design project during a recession time.
On the high-level synthesis it is simply the question if the higher abstraction level for hardware block design is the critical problem for multi-core SoC design. With the cost of software development skyrocketing for fabless and integrated semiconductor companies, how much do they really want to invest into the hardware component design automation. Is it more important to make 100 hardware designers productive or 400 software developers?
It is time to concentrate efforts on the real big cost savers for multi-core design. Rather then spending the time on making that one new RTL block easier to develop, spend the time to prepare the models for the many other IP blocks on the chip, that are critical for architecture exploration and early software development.
It is time for Electronic System Virtualization. The 47th DAC will have to demonstrate, that it can concentrate its attention on the bigger issues. Who wants to sit through another ESL debate next year?